Example Hardware Feature Scenarios

This section describes how to expose hardware-specific features to the user through OpenCL and SYCL when implementing a ComputeMux target for a given hardware platform. Most of these features are not expected to be core parts of the two standards mentioned above and would likely be exposed as extensions, however existing functionality can also be targeted. Due to the general-purpose nature of these standards, this section has performance-related features in mind when describing how to expose the hardware’s capabilities to the user.

• Mapping Custom Instructions To Builtin Functions
  • Mapping to existing OpenCL builtins
  • Creating New Custom Builtin Functions That Map To Compiler Intrinsics
• Mapping Custom IP Blocks To Builtin Kernels
• How To Support Large Scratchpad Memories
  • Dedicated Global Memory
  • Dedicated Shared Memory
  • Implementation Notes
• Mapping Algorithms To Vector Hardware
  • Work-group Scheduling
  • Handling Barriers
  • The Vecz Whole-Function Vectorizer
  • N-D Range Sizing
• RefSi In-Kernel DMA for RISC-V
  • Purpose
  • How It Works
  • How To Use
  • Implementation